Intel Xeon 6 processors when using Intel TDX: privilege escalation
High7.0CVE-2025-31936 · Published Aug 11, 2026 · updated Sep 18, 2026
Improper handling of overlap between protected memory ranges for some Intel(R) Xeon(R) 6 processors when using Intel(R) TDX within SMM may allow an escalation of privilege. SMM adversary with a privileged user combined with a high complexity attack may enable escalation of privilege. This result may potentially occur via local access when attack requirements are present with special internal knowledge and requires no user interaction. The potential vulnerability may impact the confidentiality (high), integrity (high) and availability (none) of the vulnerable system, resulting in subsequent system confidentiality (none), integrity (none) and availability (none) impacts.
Affected versions
| Package | Affected | Fixed in |
|---|---|---|
| Intel(R) Xeon(R) 6 processors when using Intel(R) TDX Product | <= See references | No fix yet |
Details and references
- CVSS 4.0
- CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N/E:X/CR:X/IR:X/AR:X/MAV:X/MAC:X/MAT:X/MPR:X/MUI:X/MVC:X/MVI:X/MVA:X/MSC:X/MSI:X/MSA:X/S:X/AU:X/R:X/V:X/RE:X/U:X
- Severity from
- the vendor (its own CVE record or advisory)
- Weakness
- CWE-1260
More Intel advisories
All Intel| Date | Advisory | Severity | Fixed in |
|---|---|---|---|
| Aug 11 | Intel reference platforms: information disclosure | Medium4.0 | No fix yet |
| Aug 11 | Intel Xeon processors: improper input validation | Medium4.0 | No fix yet |
| Aug 11 | Intel Processors: information disclosure | Medium4.0 | No fix yet |
| Aug 11 | Intel Extension for PyTorch: unsafe deserialization | Medium4.6 | No fix yet |
| Aug 11 | Intel Transfer Learning Tool: privilege escalation | Medium6.3 | No fix yet |
| Aug 11 | Intel Slim Bootloader may allow an information disclosure. S: integer overflow | Low2.4 | No fix yet |